Understand the turn-on/turn off principle of MOS transistor

Date:2025-02-10 Categories:Product knowledge Hits:365 From:Guangdong Youfeng Microelectronics Co., Ltd


By understanding the on/off principle of MOS transistors, you will find that using PMOS as the upper transistor and NMOS as the lower transistor is more convenient. The circuit design using PMOS as the lower transistor and NMOS as the upper transistor is complex and generally not meaningful, so it is rarely used.

Let's first understand the on/off principle of MOS transistors:

The main circuit current direction of NMOS transistor is D → S, and the conduction condition is that VGS has a certain voltage difference, generally 5-10V (G potential is higher than S potential); The main circuit current direction of PMOS transistor is S → D, and the conduction condition is that VGS has a certain voltage difference, generally -5~-10V (S potential is higher than G potential). Taking the conduction voltage difference of 6V as an example below.

NMOS transistor

Using an NMOS transistor, the S pole is directly grounded (with a fixed value), and only the G pole voltage needs to be fixed at 6V to conduct; If an NMOS is used as the upper transistor, the D terminal is connected to the positive power supply, and the voltage at the S terminal is not fixed, it is impossible to determine the G terminal voltage that controls the conduction of the NMOS, because the voltage at the S terminal to ground has two states. When the MOS transistor is turned off, it is at a low level, and when it is turned on, it is close to the high level VCC. Of course, NMOS can also be used as a transistor, but the control circuit is complex and requires the use of isolated power supply control. For things that can be solved by using a PMOS transistor, this is generally not done, which significantly increases the difficulty of the circuit.

PMOS transistor

Using PMOS as the upper transistor, the S pole is directly connected to the power supply VCC, and the S pole voltage is fixed. Only the G pole voltage is 6V lower than the S pole to conduct, which is convenient to use; Similarly, if a PMOS transistor is used with the D pole grounded and the S pole voltage not fixed (0V or VCC), it is difficult to determine the voltage of the control pole G pole, making it difficult to use and requiring an isolated voltage design.

 


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